Photolithography is a part of the top-down approach that forms the basis of various processes in the semiconductor industry, which has followed Moore's law for new generations of devices. However, as feature sizes are scaled to the nanometer regime, the bottom-up approach is being touted as a means to solve problems arising due to size reduction. Here the authors report a result based on the convergence of 193 nm lithography and electrostatic layer-by-layer assembly, which overcomes the resolution limit of photolithography and also assists self-assembly to form complex patterns. Their result shows that hurdles associated with top-down approaches to further device scaling can be overcome by introducing bottom-up approaches. (c) 2006 American Vacuum Society.