Dynamic SIMS has been applied to investigate the influence of impurity profiles on the characteristics of ultra-shallow GaAs sidewall tunnel junctions. SIMS depth profile on test-element-group areas on the device chips have shown that the Be profiles pile-up, with concentrations of up to 10(20) cm(-3) at the tunnel junction interfaces. This result illustrates one of the dominant causes why very high peak current densities are achieved. (c) 2006 Elsevier B.V. All rights reserved.