Proof-of-concept notched-gate metal-oxide-semiconductor field-effect transistor (MOSFET) with the integration of atomic layer deposition (ALD) metal gate/high-kappa dielectric is demonstrated. The notched gate is formed by a combination of plasma dry etch and subsequent selective wet etch of a poly-Si0.7Ge0.3/TiN bilayer gate electrode stack. The height of the notch is determined mainly by the thickness of the TiN layer, and the width is controlled by the wet underetch of the TiN beneath the Si0.7Ge0.3 layer. Compared with reference MOS transistors with a similar gate stack, the notched gate pMOSFETs exhibited an expected reduction of the parasitic overlap capacitances. (C) 2004 The Electrochemical Society.