A gate overlapped lightly doped drain (GOLDD) poly-Si thin film transistor (TFT) employing the 45 S tilt implant for source and drain (S/D) regions, is proposed. In order to activate both n(+) S/D and n-lightly doped drain (LDD) regions, and to eliminate junction defects, oblique-incident excimer laser annealing activation (OI-ELA) was performed. At certain conditions, such as when V-DS = 3.3 V, V-GS = -20 V, the proposed poly-Si TFT with W/L = 10 mu m/3 mu m exhibited a lower anomalous leakage current of 4.7 x 10(-11) A/mu m, than conventional TFTs, with an anomalous leakage current of 1.7 x 10(-9) A/mu m. In addition, the proposed device held 89% of maximum transconductance against hot-carrier stress, compared to the conventional one, which holds 46%. (c) 2006 The Electrochemical Society.