화학공학소재연구정보센터
Electrochemical and Solid State Letters, Vol.10, No.9, H278-H280, 2007
Improvement in positive-bias-temperature-instabilities reliability and device performance of TaSiN/ HfSiON gate stacks with high temperature post-nitridation annealing
We have investigated the effect of a post-nitridation-annealing (PNA) temperature on bias-temperature-instabilities (BTI) reliability and device performance of TaSiN/HfSiON gate stacks formed by atomic layer deposition technology using Hf[N(CH3)(C2H5)](4) and SiH[N(CH3)(2)](3) precursors. The TaSiN/HfSiON gate stacks were intended for use in conventional metal gate transistors with a high temperature thermal budget of 950 degrees C. Ultrathin effective-oxide-thickness films of about 0.8 nm could be achieved with HfSiON gate stacks by using a 1050 degrees C PNA treatment. Moreover, the positive-BTI lifetimes of the 1050 degrees C PNA samples were improved by about one order of the magnitude with respect to lifetimes of the 950 degrees C PNA samples, ten year lifetimes being readily achieved with V-g = + 1.0 V at 125 degrees C. (c) 2007 The Electrochemical Society.