Partial silicon-on-insulator (PSOI) is a new technology for fabricating power integrated circuits (PICs) in which the buried oxide is patterned to give silicon windows beneath the anodes of the power devices, yielding breakdown voltages and a self-heating effect comparable to those obtained in bulk silicon, yet while retaining the good isolation between the power devices and the low-power CMOS which is inherent in silicon-on-insulator [Popescu A, Udrea F, Milne W. Proceedings of GAS. 1997. p. 102-3, Lim H, Udrea F, Garner D, Milne W. Solid-State Electronics 1999;43(7):1267-80]. For a PIC, both a high-side and a low-side power device are often required. While this is possible when the power devices are LDMOSFETs [Lim H, Udrea D, Garner K, Shen K, Milne W. Proceedings of GAS. 1999. p. 149-52], high side Lateral Insulated Gate Bipolar Transistors (LIGBTs) are difficult to fabricate in PSOI due to the unacceptably high leakage current which flows from the anodes of the LIGBTs, through the silicon window, to the substrate, and which can constitute 9.3% of the total device current. In this article, we present a novel method of eliminating that current by incorporating a deep nt diffusion between the anode of the high-side LIGBT and the silicon window. Therefore, a PSOI PIC technology is arrived at, which has everything that is required for a PIC technology: a high breakdown voltage, a similarly good self-heating effect to bulk technology, a good turn-off performance, good isolation between power devices and CMOS circuitry, and the availability of both high-side and low-side LIGBTs and LDMOSFETs.