The parametric yield of VLSI depends strongly on the statistical process fluctuations. Using an analytical model, this paper analyzes the relations between process fluctuations and circuit performance variations. namely, process-to-device and device-to-circuit response surfaces. It is found that the worst-case for the channel length L, the gate insulator thickness t(ox), and the channel impurity concentration N-chn corresponded to those for the ring oscillator propagation delay tau (pd) when the drain current was estimated using the saturation velocity upsilon (sat), since the response surfaces for L-to-tau (pd), tau (ox)-to-tau (pd) and N-chn-to-tau (pd) were monotonic. The fluctuations of L resulted in a lower tail of the distribution of the NMOS threshold voltage V-thn due to the short-channel effect and a higher tail of the drain saturation current I-dn. However, the distribution of tau (pd) was nearly normal, as the probability of the normal distribution (the P-value) was greater than 5%. This is because the influence of L on tau (pd) was mainly due to the gate capacitance C-g. Also, the non-linear relation between L and V-thn was cancelled by the non-linear I-dn-to-tau (pd) response surface.