Fabricated strained Si/Si0.8Ge0.2/Si heterojunction PMOSFET devices have been used to calculate the hole mobility in surface-Si and buried-SiGe channels. A simple analysis based on the inversion layer mobility model has been used to find the current contribution of the buried-SiGe channel to the total drain current. The 'true' effective mobility enhancement in the buried channel of the fabricated Si0.8Ge0.2 PMOSFET device has thus been extracted over a temperature range of 77-300 K. The validity of the model has been verified by calculating the drain current as a function of drain voltage at different values of gate bias considering the estimated effective mobility of both parasitic-Si and buried-SiGe channels.