화학공학소재연구정보센터
Solid-State Electronics, Vol.46, No.11, 1907-1912, 2002
Suppression of parasitic JFET effect in trench IGBTs by using a self-aligned p base process
This paper presents the suppression of the parasitic JFET effect in high voltage Trench insulated gate bipolar transistors (IGBTs) by employing a new self-aligned p base process. The parasitic JFET effect is no longer negligible because the lowly doped n(-) drift region becomes longer and at the same time the cell current density becomes lower in high voltage applications. The self-aligned p base process is based on the use of a common nitride mask for trench etching and p boron diffusion and therefore eliminates an extra process mask. Furthermore, the self-aligned p base structure effectively suppresses the parasitic JFET effect into a small area near the trench source and results in considerably enhanced on-state performance. Extensive numerical simulations using the MEDICI simulator have been carried out and the results show that by using the new self-aligned p base process one can relieve the pressure resulted from processing very deep trenches in high voltage Trench IGBTs. (C) 2002 Elsevier Science Ltd. All rights reserved.