Solid-State Electronics, Vol.47, No.10, 1677-1683, 2003
Electrical properties of Si-SiO2 interface traps and evolution with oxide thickness in MOSFET's with oxides from 2.3 to 1.2 nm thick
Recently, the extraction of interface trap densities in MOSFET's with ultrathin oxides, down to 1.2 nm, has been reported [MRS 2002 Spring meeting, San Francisco, April 1-5, MRS Proceedings 706, 2002, p. 293; IEEE Electron Dev. Lett. 23 (2002) 658]. The simplicity of the charge pumping (CP) method used contrasts with the heavy numerical calculations required to account for quantum mechanical effects in such structures due to oxide thickness and high doping concentrations. The reliability of the small gate pulse CP method proposed is discussed. The contribution of carrier emission, neglected in the model, is analyzed with regard to the experimental conditions used for the measurements and is shown to be negligible. Using a device with a thick oxide, the reliability of this approach is demonstrated by comparing the results with those obtained using the conventional large gate pulse CP mode. The effect, oil the results, of quantization of the inversion and accumulation layers and of the polysilicon dark space is also addressed. Both have a negligible impact on the trap densities obtained. It is also shown that the trap cross sections can be extracted from the same measurements. Devices with oxides from 2.3 to 1.2 nm thick are studied. The interface trap densities and the trap cross sections are found independent of the oxide thickness. (C) 2003 Elsevier Ltd. All rights reserved.