This paper summarizes various aspects of gate leakage on MOSFETs DC and AC characteristics. Based on measurements on test structures with various electrical silicon oxide thicknesses (from 21 to 13 Angstrom) and areas (from 27,000 to 2 mum(2)), we show that gate current produces a channel surface potential debiasing that can strongly modify the I(V) and C(V) curves measured using conventional DC analyzer and LCR meters. In particular, we report unusual gate current density I-G/(W x L) area dependency and degraded C(V) curves at high gate leakage, that cannot be accounted for by compact models in series with parasitic gate resistances. We propose a segmented-MOS model, allowing discrete solution of the current continuity equation along the channel, which fits the measured C(V) and I(V) curves and provides a solution for first-order parameters extraction (such as oxide thickness or channel mobility). (C) 2003 Elsevier Ltd. All rights reserved.