Solid-State Electronics, Vol.48, No.5, 721-729, 2004
Quantifying hole mobility degradation in pMOSFETs with a strained-Si0.7Ge0.3 surface-channel under an ALD TiN/Al2O3/HfAlOx/Al2O3 gate stack
An appreciable mobility enhancement up to 35% is found in p-channel MOSFETs with a stramed-Si0.7Ge0.3 surface-channel under an ALD TiN/Al2O3/HfAlOchi/Al2O3 gate stack, as compared to a Si-channel reference transistor under an identical gate stack. A distorted effective mobility curve with a slow mobility roll-off at low vertical electric field is however extracted for the Si0.7Ge0.3 devices following the standard split-CV measurement procedure. A high density of interface traps on the order of 10(12) cm(-2) eV(-1) is found in these Si0.7Ge0.3 devices using charge-pumping measurements. Thus, this distortion is attributed partly to trapping of a significant fraction of the inversion carriers at the interface between the high-kappa dielectrics and the Si0.7Ge0.3 channel, thus defeating the validity of the usual formulation for mobility extraction. By taking into account the trapped carriers that are detectable by the split-CV measurement but do not contribute to the drain conductance, a corrected effective mobility curve is obtained. The distortion of the effective mobility curve is nonetheless mainly due to mobility degradation as a result of Coulomb scattering of the mobile channel carriers by the charged interface defects, i.e. charged traps or trapped carriers that remain charged. (C) 2003 Elsevier Ltd. All rights reserved.
Keywords:high-K;mobility;interface traps;strained-SiGel;MOSFET;atomic layer chemical vapour deposition (ALD)