A physics-based analytical model of SiC MESFET incorporating trapping and thermal effects is reported. The model takes into account the field and temperature dependencies of carrier transport parameters and carrier trapping effects. Both surface and substrate traps have been incorporated in the model to calculate the observed current slump in the I-V characteristics. The trapping and detrapping from surface traps control the channel opening at the drain end of the channel that requires the drain resistance to be gate and drain voltage dependent. The substrate traps capture channel electrons at high drain bias when the buffer layer is fully depleted resulting current collapse at low drain bias in the following I-V trace. The detrapping of the captured electrons is initiated with increasing drain bias and the channel electron concentration increases which is accelerated by increased thermal effects. As a result, restoration of collapsed drain current is obtained before the trapping effect is reinitiated at high drain bias. The calculated results using the current model are in good agreement with experimental data. (C) 2004 Elsevier Ltd. All rights reserved.