Device mismatch is responsible for significant performance degradation of integrated RF transceivers and differential circuits in digital systems. Consequently, it becomes essential to achieve a high degree of matching in matched transistor pairs. An important criterion to achieve matching is that matched pairs should be covered with identical metal patterns or no metal at all [Proc. IEEE, Int. Conf. Microelectron. Test Struct. 7 (1994) 21]. In modern IC design, however, dense interconnect patterns exist over transistors due to real-estate limitations and metal uniformity requirements. In this paper we present a comprehensive study of the impact of asymmetric metal coverage on matched high performance MOSFET pairs. Dedicated test structures were fabricated on LSI Logic 0.18 mum technology, and measurement results are presented on the impact of asymmetric coverage of up to five aluminum metal layers on the transistor pairs. (C) 2004 Elsevier Ltd. All rights reserved.