Applying independent but complementary mathematical approaches to the same device, we model the capacitance voltage (C-V) characteristics of deep sub-0.1 micron MOS devices. Our basic tool in this effort is a 3D quantum mechanically (QM) corrected variational methodology. The variational method is based on minimization of the Helmholtz free energy of the system and results in closed form expressions for the capacitance as a function of device dimensions, doping, and applied voltage. These expressions contain free parameters, which must be determined from more exhaustive analysis, or from experimental data. We calibrate the variational results using ATLAS, a commercially available TCAD suite by SILVACO. The numerical simulations correspond to consistent 2D Poisson-1D Schrodinger solutions. We use the calibrated variational tool to investigate the effect on C-V characteristics of gate dimensions, oxide thickness, and doping concentration. Excellent agreement has been achieved between results obtained by both methods. (C) 2004 Elsevier Ltd. All rights reserved.