A conventional Monte-Carlo simulator has been extended to include electrostatic and transport effects that are most relevant for the analysis of nano-scale MOSFETs with either bulk or single and double gate silicon-on-insulator (SOI) architectures and silicon film thickness down to approximately 10 nm. Corrections to the self-consistent electrostatic potential and a new model for the surface roughness scattering have been included. The effectiveness of the approach has been tested simulating carrier transport in a 25 nm double gate SOI MOSFET. The simulation results point out the strong influence of the scattering on the ON current even in these ultra-scaled devices. (c) 2005 Elsevier Ltd. All rights reserved.