We proposed a gradually profiled-Hf interface as a design concept of the high-k/SiO2 interface region for improving the high-k stack dielectric reliability by controlling the compositional profile between the high-k bulk layer and the underlying SiO2 layer. This gradually profiled-Hf interface named as the constituent gradual interface layer CG-IL is fabricated by the Hf diffusion into the underlying SiO2 with repeating the sequence of thin HfO2 film deposition and annealing through the "layer-by-layer deposition and annealing (LL-D & A)" technique. The electrical characteristics of MOSFETs with the CG-IL and TaN gate were evaluated. Also, as a reference, we fabricated the conventional HfO2/SiO2 bi-layer structure MOSFETs. The gate leakage current through the CG-IL structure is more than one order of magnitude smaller than that of the bi-layer structure, despite of the thinner EOT. Also, the dielectric breakdown voltage of MOS capacitors with the CG-IL structure is higher than that of the conventional bi-layer structure. Furthermore, the distribution of time-to-breakdown of MOS capacitors with GC-IL structure is significantly improved compared with that of the bi-layer structure. We consider that the CG-IL structure forms the robust interfacial structure between HfO2 and SiO2, by mainly reducing the defects states localized around the HfO2/SiO2 interface region, and is a promising structure for achieving the highly reliable high-k gate stacks. (c) 2006 Elsevier Ltd. All rights reserved.