In this letter, we demonstrate an In0.53Ga0.47As channel n-type metal-oxide-semiconductor field-effect transistor (MOSFET) with silicon interface passivation layer (IPL) and HfO2 gate oxide. The effects of the source/drain activation temperature, postdeposition annealing temperature, and thickness of silicon IPL on the transistor characteristics have been investigated. The results suggest that the annealing temperatures are critical for determining the transistor performances. Even though In0.53Ga0.47As is easier to obtain the unpinned surface Fermi level compared to GaAs, applying silicon IPL still improves the In0.53Ga0.47As nMOSFET characteristics significantly through engineering the HfO2/In0.53Ga0.47As interface quality.