A surface passivation technique for GaAs that comprises in situ vacuum anneal and silane (SiH4) treatment and that is compatible and can be easily integrated with a matured metallorganic chemical vapor deposition high-k gate dielectric process module is demonstrated. Extensive investigation of the dependence of electrical characteristics of TaN/HfAlO/GaAs gate stacks on process conditions, including in situ vacuum anneal and SiH4 treatment temperatures, postgate-dielectric deposition anneal, and forming gas anneal conditions, is reported. It is shown that excellent capacitance-voltage characteristics with low-frequency dispersion, small hysteresis, and low midgap interface state density D-it of 2.8-4.8 x 10(11) cm(-2) eV(-1) can be achieved with optimum processing conditions. The passivation technique reported here enables the fabrication of a self-aligned n-metal oxide semiconductor field-effect transistor, exhibiting good transfer characteristics with high peak carrier mobility of 1154 cm(2)/V s. The incorporation of Si+ and P+ coimplantation for achievement of high dopant activation in deep source and drain (S/D) regions and complementary metal oxide semiconductor compatible gold-free-based PdGe S/D ohmic contacts were also demonstrated. (C) 2008 The Electrochemical Society.