Ta-Si-C amorphous films 5 nm thick were found applicable as a diffusion barrier against Cu penetration for sub-65 nm integrated circuit processing. The failure mechanisms of such a barrier were still unknown and were explored in this study. Ta-Si-C films were prepared by magnetron cosputtering using TaSi2 and C targets on p-type Si(100) substrate. Failure mechanisms were explored by Auger electron spectroscopy, X-ray diffraction, transmission electron microscopy, and four-point probe measurement on annealed films. In a sandwiched scheme Si/Ta-Si-C (5 nm)/Cu, the failure temperatures 750 (18 atom % C) and 800 degrees C (24 atom % C) were demonstrated. Deterioration of Ta-Si-C barriers arose from local nucleation of TaSi2 crystallites, providing short paths for copper penetration. Carbon addition significantly inhibited the formation of TaSi2 and increased the failure temperature of the barriers. From the understanding of the failure mechanism a possible solution is proposed to research thinner barriers (such as 2 nm) to meet the 2016 International Technology Roadmap for Semiconductors.