화학공학소재연구정보센터
Journal of the Electrochemical Society, Vol.156, No.8, H644-H647, 2009
Improvement of Device Performance by Optimizing the Advanced DCV Process Condition in Dual-Damascene Cu Interconnects
The effects of the Ar+ resputtering condition in the advanced direct contact via (DCV) process for a Cu barrier metal on the electroplated (EP) Cu gap-fill performance, via chain resistance, electromigration (EM) resistance, and static random access memory (SRAM) column failure rate was investigated. The adoption of Ar+ resputtering had noticeable effects on the EP Cu gap-fill performance and via chain resistance. The via holes with diameters of more than 0.11 mu m could be filled without voids by EP Cu with the assistance of an advanced DCV process, and the resulting via chain resistance strikingly decreased by applying this advanced DCV process. As long as the EM resistance is concerned, the Ar+ resputtering condition shows a wide process range. However, the failure rate of the SRAM functionality was 15% even though the advanced DCV process with Ar+ resputtering was utilized for the Cu barrier metal process. Finally, the failure rate of the SRAM functionality was reduced 90% by implementing the optimized Ar+ resputtering condition in the advanced DCV process.