A novel self-aligned mu Trench-based cell architecture for phase change memory (PCM) process is presented. The low programming Current and the good dimensional control of the sub-lithographic features achieved with the mu Trench structure are combined with a self-aligned patterning strategy that simplify the integration process in term of alignment tolerances and of number of critical masks. The proposed architecture has been integrated in a 90 nm 128 Mb vehicle based on a pnp bipolar junction transistor for the array selection. The good active and leakage Currents achieved by the purposely optimized selecting transistors combined with programming Currents of 300 mu A of the storage element and good distributions measured oil the 128 Mb array demonstrate the Suitability of the proposed architecture for the production of high-density PCM arrays at 90 nm and beyond. (C) 2008 Published by Elsevier Ltd.