Formation of polycrystalline-Si thin-film-transistor (TFT) with a retrograde channel doping profile has been proposed. By this scheme, a relatively high dopant concentration is formed in the lower channel region, for reducing the depletion region within the bulk channel region. Furthermore, a relatively low dopant concentration is formed in the upper channel region, for retaining the on-state current as well as reducing the electric field within the upper channel region near the drain. In addition, with further using the lightly doped drain (LDD) structure, the relatively higher electric field caused by the higher channel doping concentration within the lower channel region would be considerably lessened. Thus, the leakage current due to carrier field emission via traps may be reduced. As a result, for the poly-Si LDD TFT device of only 1-mu m gate length, a retrograde channel doping profile can result in a I-order smaller leakage current than a conventionally undoped channel profile, while achieving comparable on-state current. (C) 2009 Elsevier Ltd. All rights reserved.