Solid-State Electronics, Vol.54, No.11, 1304-1311, 2010
Selection of gate length and gate bias to make nanoscale metal-oxide-semiconductor transistors less sensitive to both statistical gate length variation and temperature variation
Aggressive scaling of transistors leads to an ever-increasing amount of process variations. In this work, we studied the gate length dependency of on-current (I-on), off-current (I-off), effective drive current (I-eff), saturation threshold voltage and temperature independent point (TIP). Experimental evidence show that the gate length dependency of TIP in nanoscale transistors is related to the V-th,V-sat versus L characteristics rather than velocity saturation. We found that I-on, I-off and I-eff of nanoscale transistors in the transition between reverse short channel effect (RSCE) and short channel effect (SCE) are less sensitive to gate length variation and temperature variation. (C) 2010 Elsevier Ltd. All rights reserved.