A new self-consistent technique is proposed to simultaneously extract the density of interface traps (DO and flat-band voltages of MOS structures fabricated on technologically relevant high-mobility semiconductors with arbitrary combination of gate stacks. The technique is based on novel analysis of the low-frequency C-V measurement. The two major problems associated with the existing low-frequency C-V technique for arbitrary substrate/oxide combinations are resolved by (i) accurate calculation of the ideal semiconductor capacitance using a self-consistent, quantum-mechanical model including wave function penetration effect, and (ii) accurate determination of the flat-band voltage utilizing an iterative scheme. The proposed technique has been applied to extract D-it profiles of a number of MOS structures fabricated on III-V semiconductors like InGaAs (with ALD grown Al2O3 gate dielectric) and elemental semiconductors like Ge (with GeON gate dielectric). The advantages of the proposed technique have been demonstrated by comparing with D-it profiles extracted from other capacitor-based extraction methods. (C) 2010 Elsevier Ltd. All rights reserved.