Solid-State Electronics, Vol.62, No.1, 115-122, 2011
MOSFET modeling for design of ultra-high performance infrared CMOS imagers working at cryogenic temperatures: Case of an analog/digital 0.18 mu m CMOS process
Design and simulation of mixed analog-digital circuits working at low temperature, typically between 77 K and 200 K, requires advanced compact models incorporating most of the physical effects occurring in cooled MOSFET. In this paper, some specific effects, such as freeze-out in LDD regions or quantization of the inversion layer in silicon sub-bands, observed at intermediate temperature are described and tentatively modeled. This study is performed on a dual gate oxide CMOS technology with 0.18 mu m/1.8 V and 0.35 mu m/3.3 V MOSFET transistors. Some improvements of compact models will allow a very precise description of MOS transistors for design of ultra-high performance infrared CMOS imagers working at cryogenic temperatures. Data on low frequency noise and transistor matching at low temperature are also presented. (C) 2011 Elsevier Ltd. All rights reserved.
Keywords:MOSFET;Cryogenic temperature;CMOS infrared image sensors;Low frequency noise;Transistor matching;Analog design