초록 |
Since the discovery of graphene, a plenty of two-dimensional (2D) materials have been studied by research groups due to their excellent physical properties. They are also called as van der Walls (vdW) materials originated from weak layer-to-layer coupling compared to atomic bonds in a single layer. Among them, semiconducting 2D materials such as MoS2, WS2, and SnS2 are considered as a candidate to replace current Si-based electronic devices. Here, we report a vertically-stacked SnS2 channel field-effect transistor (VFET) with graphene source/drain electrode encapsulated with hBN. All vdW materials used in this research were mechanically exfoliated from as-received bulk materials and transferred using PDMS stamping method under microscope inspection. Each vdW materials was stacked in the vertical direction from the source to the drain followed by e-beam lithography to define contact pads. Bottom hBN nanosheet was employed to decrease substrate effect such as charged impurities and SiO2 interface traps and top hBN acted as a passivation layer. |