| 초록 |
RC delay problem in integrated circuit (IC) technology becomes a significant issue due to the difficulty of device scaling. Therefore, the reduction of local and global interconnects is a key factor for high performance and high density devices. One solution for RC delay mitigation is utilizing 3D integration technology with Cu-to-Cu bonding technique. However, one limitation of Cu-to-Cu bonding is a relatively high bonding temperature for IC fabrication. In this study, the plasma-treated Cu interconnect surface was investigated to reduce a bonding temperature possibly without increasing an electrical resistance. Cu less than 50nm in thickness was deposited using a sputtering process and Ar plasma treatment was done on Cu surface by sputtering. The experiment was performed using DOE (design of experiment) method with three process parameters: rf power from 50 to 150W, process time from 60 to 300sec, and pressure from 0.67Pa to 3.33Pa. Microstructure, sheet resistance, surface roughness, and contact angle were measured, and the die-to-die thermo-compression bonding was performed at 300oC under 2MPa for each sample and the bond quality was analyzed by SAM (scanning acoustic microscopy). |
