| 초록 |
We fabricated an array of all-inkjet-printed vertical Schottky barrier (SB) transistors and various logic gates on a large-area substrate. All of the electronic components, including the indium–gallium–zinc–oxide (IGZO) semiconductor, reduced graphene oxide (rGO), and indium–tin–oxide (ITO) electrodes and the ion-gel gate dielectric, were directly and uniformly printed onto a 4 in. wafer. The vertical SB transistors had a vertically stacked structure, with the inkjet-printed IGZO semiconductor layer placed between the rGO source electrode and the ITO drain electrode. The ion-gel gate dielectric was also inkjet-printed in a coplanar gate geometry. The channel current was controlled by adjusting the SB height at the rGO/IGZO heterojunction under application of an external gate voltage. The high intrinsic capacitance of the ion-gel gate dielectric facilitated modulation of the SB height at the source/channel heterojunction to around 0.5 eV at a gate voltage lower than 2 V. |
