| 학회 | 한국재료학회 |
| 학술대회 | 2017년 봄 (05/17 ~ 05/19, 목포 현대호텔) |
| 권호 | 23권 1호 |
| 발표분야 | G. 나노/박막 재료 분과 |
| 제목 | Top gate field effect transistor based on graphene/h-BN/SnS2 heterostructures. |
| 초록 | Over the last decade, two-dimensional (2D) materials have been studied as promising candidates for electronics device due to their electronic properties. In this research, a 2D material SnS2, graphene, h-BN are stacked to form a top gate SnS2 field effect transistor. First, 10 layer thick (~ 6 nm) SnS2 is a grown on p++ Si/SiO2 substrate by atomic layer deposition (ALD). The growth/annealing temperature was as low as 150/300 ℃. Then exfoliated graphene/h-BN/graphene were consecutively transferred to act as the source, drain contact electrode/gate dielectric/gate electrode. We transfer exfoliated 2D materials using dry transfer stamping method by polydimethylsiloxane. In order to reduce contact resistance, we use exfoliated graphene as source/drain contact. [1] Ni (10nm) /Au (70nm) contact of the device was fabricated by e-beam lithography. In conclusion, a top gate SnS2 field effect transistor shows enhanced characteristics by contact engineering and encapsulation of channel surface. References 1. Lili Yu, Yi-Hsien Lee, Xi Ling, Elton J. G. Santos, Yong Cheol Shin, Yuxuan Lin, Madan Dubey, Efthimios Kaxiras, Jing Kong, Han Wang, and Tomas Palacios. (2014) Graphene/MoS2 Hybrid Technology for Large-Scale Two-Dimensional Electronics. Nano Lett. 14, 3055−3063 |
| 저자 | Sohee Kim, Jeongsu Lee, Gunwoo Lee, Hojun Seo, Onejae Sul, Seung-Beck Lee |
| 소속 | Hanyang Univ. |
| 키워드 | Transistor; SnS<SUB>2</SUB>; Heterostructure |
