| 학회 | 한국재료학회 |
| 학술대회 | 2013년 가을 (11/06 ~ 11/08, 제주롯데호텔) |
| 권호 | 19권 2호 |
| 발표분야 | A. 전자/반도체 재료(Electronic and Semiconductor Materials) |
| 제목 | Influence of current compliance level on Ag Bridge formation for Conductive Bridge RAM |
| 초록 | Conductive bridge random-access-memory(CBRAM) has been considering as a non-volatile resistive switching memory with a bipolar characteristic. CBRAM has studied by many research groups because it has a lot of advantages such as high speed, great potential of scaling, simple structure and low power consumption. We investigated influence of current compliance level on Ag bridge-formation for Conductive Bridge RAM through analyzing electrical characteristics. CBRAM was fabricated with a nano-hole patterned wafer which patterned by dry etching process. And then, copper oxide(CuO) layer as an active layer was deposited on Pt bottom electrode by RF magnetron sputtering. Finally, Ag as a reactive electrode was deposited on the copper oxide by a thermal evaporation process. It was observed that the memory margin(Ion/off), retention time and endurance cycles of program and erase of CBRAM were higher than 8.48 x 101, 105 sec and 9 x 102, respectively. Through a voltage driving scheme, it was found that the area at reverse bias on the I-V curve increased with a current compliance level. It was considered that the thickness of Ag conductive bridge increased with a current compliance level. This tendency indicates that the power consumption is more required to remove the Ag conductive bridge increasing with current compliance level. In addition, it was confirmed that there is a possibility of multi-HRS level because HRS current level could be controlled by depending on how much an applied reverse bias. *This work was financially supported by the Industrial Strategic Technology Development Program(10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy(MOTIE), Republic of Korea & Brain Korea 21 PLUS in 2013. |
| 저자 | Han-Vit Jeoung1, Hyun Min Seung2, Kyoung-Cheol Kwon1, Jong-Sun Lee2, Myung-Jin Song3, Ki-Hyun Kwon2, Young Hye Son1, Jea-Gun Park2 |
| 소속 | 1Department of Electronics and Computer Engineering, 2Hanyang Univ., 3Department of Nanoscale Semiconductor Engineering |
| 키워드 | CBRAM; CuO; Non-volatile memory; current compliance level; conductive bridge; HRS; LRS |
