검색결과 : 5건
| No. | Article |
|---|---|
| 1 |
Faceting and nanostructure effects in Si and SiGe epitaxy Dutartre D, Seiss B, Campidelli Y, Pellissier-Tanon D, Barge D, Pantel R Thin Solid Films, 520(8), 3163, 2012 |
| 2 |
FDSOI devices with thin BOX and ground plane integration for 32 nm node and below Fenouillet-Beranger C, Denorme S, Perreau P, Buj C, Faynot O, Andrieu F, Tosti L, Barnola S, Salvetat T, Garros X, Casse M, Allain F, Loubet N, Pham-Nguyen L, Deloffre E, Gros-Jean M, Beneyton R, Laviron C, Marin M, Leyris C, Haendler S, Leverd F, Gouraud P, Scheiblin P, Clement L, Pantel R, Deleonibus S, Skotnicki T Solid-State Electronics, 53(7), 730, 2009 |
| 3 |
Folded fully depleted FET using Silicon-On-Nothing technology as a highly W-scaled planar solution Bidal G, Loubet N, Fenouillet-Beranger C, Denorme S, Perreau P, Fleury D, Clement L, Laviron C, Leverd F, Gouraud P, Barnola S, Beneyton R, Torres A, Duluard C, Chapon JD, Orlando B, Salvetat T, Grosjean M, Deloffre E, Pantel R, Dutartre D, Monfray S, Ghibaudo G, Boeuf F, Skotnicki T Solid-State Electronics, 53(7), 735, 2009 |
| 4 |
Pore sealing of a porous dielectric by using a thin PECVD a-SiC : H conformal liner Jousseaume V, Fayolle M, Guedj C, Haumesser PH, Huguet C, Pierre F, Pantel R, Feldis H, Passemard G Journal of the Electrochemical Society, 152(10), F156, 2005 |
| 5 |
Emerging silicon-on-nothing (SON) devices technology Monfray S, Skotnicki T, Fenouillet-Beranger C, Carriere N, Chanemougame D, Morand Y, Descombes S, Talbot A, Dutartre D, Jenny C, Mazoyer P, Palla R, Leverd F, Le Friec Y, Pantel R, Borel S, Louis D, Buffet N Solid-State Electronics, 48(6), 887, 2004 |