FDSOI devices with thin BOX and ground plane integration for 32 nm node and below

Fenouillet-Beranger C; Denorme S; Perreau P; Buj C; Faynot O; Andrieu F; Tosti L; Barnola S; Salvetat T; Garros X; Casse M; Allain F; Loubet N; Pham-Nguyen L; Deloffre E; Gros-Jean M; Beneyton R; Laviron C; Marin M; Leyris C; Haendler S; Leverd F; Gouraud P; Scheiblin P; Clement L; Pantel R; Deleonibus S; Skotnicki T

Solid-State Electronics, Vol.53, No.7, 730-734, 2009

DOI10.1016/j.sse.2009.02.009 Export Citation

FDSOI devices with thin BOX and ground plane integration for 32 nm node and below

Fenouillet-Beranger C, Denorme S, Perreau P, Buj C, Faynot O, Andrieu F, Tosti L, Barnola S, Salvetat T, Garros X, Casse M, Allain F, Loubet N, Pham-Nguyen L, Deloffre E, Gros-Jean M, Beneyton R, Laviron C, Marin M, Leyris C, Haendler S, Leverd F, Gouraud P, Scheiblin P, Clement L, Pantel R, Deleonibus S, Skotnicki T

In this paper we compare Fully-Depleted Sol (FDSOI) devices with different BOX (Buried Oxide) thicknesses with or without ground plane (GP). With a simple high-k/metal gate structure, the 32 nm devices exhibits Ion/Ioff performances well suited for low power (LP) applications. The different BOX thicknesses and ground plane conditions are compared with bulk 45 nm technology in terms of variability and noise. A 0.499 mu m(2) SRAM cell has been characterized with less than 50 pA of standby current/cell and a SNM of 210 mV @ Vdd 1 V. (C) 2009 Elsevier Ltd. All rights reserved.

Keywords:SOI;Metal gate;Short-channel effects;Fully-depleted;BOX;DIBL;Subthreshold slope