화학공학소재연구정보센터
검색결과 : 8건
No. Article
1 Low-Voltage Poly-Si TFTs with Solution-Processed Aluminum Oxide Gate Dielectric
Kang I, Avis C, Kang DH, Jang J
Electrochemical and Solid State Letters, 14(8), J51, 2011
2 Low Frequency Noise Analysis of Top-Gate MgZnO Thin-Film Transistor with High-kappa ZrO2 Gate Insulator
Chiu HC, Wang HC, Lin CK, Chiu CW, Fu JS, Hsueh KP, Chien FT
Electrochemical and Solid State Letters, 14(9), H385, 2011
3 High Quality SiO2 Deposited at 80 degrees C by Inductively Coupled Plasma Enhanced CVD for Flexible Display Application
Chen T, Ishihara R, Beenakker K
Electrochemical and Solid State Letters, 13(8), J89, 2010
4 Bias Temperature Instability Characteristics of n- and p-Type Field Effect Transistors Using HfO2 Gate Dielectrics and Metal Gate
Jung HS, Kim JH, Lee J, Lee SY, Kim UK, Hwang CS, Park JM, Kim WH, Song MW, Lee NI
Journal of the Electrochemical Society, 157(3), H355, 2010
5 Wafer-scale epitaxial graphene growth on the Si-face of hexagonal SiC (0001) for high frequency transistors
Dimitrakopoulos C, Lin YM, Grill A, Farmer DB, Freitag M, Sun YN, Han SJ, Chen ZH, Jenkins KA, Zhu Y, Liu ZH, McArdle TJ, Ott JA, Wisnieff R, Avouris P
Journal of Vacuum Science & Technology B, 28(5), 985, 2010
6 Illumination-Assisted Negative Bias Temperature Instability Degradation in Low Temperature Polycrystalline Silicon Thin-Film Transistors
Lin CS, Chen YC, Chang TC, Hsu WC, Chen SC, Li HW, Tu KJ, Jian FY, Chen TC
Electrochemical and Solid State Letters, 12(6), H229, 2009
7 Fully self-aligned process for fabricating 100 nm gate length enhancement mode GaAs metal-oxide-semiconductor field-effect transistors
Li X, Hill RJW, Longo P, Holland MC, Zhou HP, Thoms S, Macintyre DS, Thayne IG
Journal of Vacuum Science & Technology B, 27(6), 3153, 2009
8 Characterization of a sol-gel based high-k dielectric field effect transistor for cryogenic operation
Khan MZR, Hasko DG, Saifullah MSM, Welland ME
Journal of Vacuum Science & Technology B, 26(6), 1887, 2008