1 - 6 |
Effects of BEOL on self-heating and thermal coupling in SiGe multi-finger HBTs under real operating condition Dwivedi ADD, Chakravorty A, D'Esposito R, Sahoo AK, Fregonese S, Zimmer T |
7 - 11 |
Investigation of low-frequency noise of 28-nm technology process of high-k/metal gate p-MOSFETs with fluorine incorporation Kao TH, Chang SJ, Fang YK, Huang PC, Wang BC, Wu CY, Wu SL |
12 - 16 |
Small signal modeling of high electron mobility transistors on silicon and silicon carbide substrate with consideration of substrate loss mechanism Sahoo AK, Subramani NK, Nallatamby JC, Sylvain L, Loyez C, Quere R, Medjdoub F |
17 - 25 |
Electrical characterization and modeling of pulse-based forming techniques in RRAM arrays Grossi A, Zambelli C, Olivo P, Miranda E, Stikanov V, Walczyk C, Wenger C |
26 - 32 |
Attainment of dual-band edge work function by using a single metal gate and single high-k dielectric via ion implantation for HP CMOS device Xu QX, Xu G, Zhou H, Zhu H, Liu J, Wang Y, Li J, Xiang J, Liang Q, Wu H, Zhong J, Xu M, Xu W, Ma X, Wang X, Tong X, Chen D, Yan J, Zhao C, Ye T |
33 - 38 |
Analysis and modeling of flicker noise in lateral asymmetric channel MOSFETs Agarwal H, Kushwaha P, Gupta C, Khandelwal S, Hu CM, Chauhan YS |
39 - 46 |
A high dynamic range power sensor based on GaAs MMIC process and MEMS technology Yi ZX, Liao XP |
47 - 53 |
Ballistic modeling of InAs nanowire transistors Jansson K, Lind E, Wernersson LE |
54 - 59 |
A compact drain current model for heterostructure HEMTs including 2DEG density solution with two subbands Deng WL, Huang JK, Ma XY, Liou JJ, Yu F |
60 - 64 |
Study on transconductance non-linearity of AlGaN/GaN HEMTs considering acceptor-like traps in barrier layer under the gate Du JF, Chen NT, Jiang ZG, Bai ZY, Liu Y, Liu Y, Yu Q |
65 - 65 |
Selected papers from the EUROSOI-ULIS conference Gnani E, Palestri P |
66 - 73 |
Nano systems and devices for applications in biology and nanotechnology Perret G, Ginet P, Tarhan MC, Baccouche A, Lacornerie T, Kumemura M, Jalabert L, Cleri F, Lartigau EF, Kim BJ, Karsten SL, Fujita H, Rondelez Y, Fujii T, Collard D |
74 - 80 |
A monolithic 3D integrated nanomagnetic co-processing unit Becherer M, Gamma SBV, Eichwald I, Ziemys G, Kiermaier J, Csaba G, Schmitt-Landsiedel D |
81 - 91 |
Replacement fin processing for III-V on Si: From FinFets to nanowires Waldron N, Merckling C, Teugels L, Ong P, Sebaai F, Barla K, Collaert N, Thean VY |
92 - 102 |
Comprehensive comparison and experimental validation of band-structure calculation methods in III-V semiconductor quantum wells Zerveas G, Caruso E, Baccarani G, Czornomaz L, Daix N, Esseni D, Gnani E, Gnudi A, Grassi R, Luisier M, Markussen T, Osgnach P, Palestri P, Schenk A, Selmi L, Sousa M, Stokbro K, Visciarelli M |
103 - 108 |
Tri-gate InGaAs-OI junctionless FETs with PE-ALD Al2O3 gate dielectric and H-2/Ar anneal Djara V, Czornomaz L, Deshpande V, Daix N, Uccelli E, Caimi D, Sousa M, Fompeyrine J |
109 - 119 |
Electron mobility in ultra-thin InGaAs channels: Impact of surface orientation and different gate oxide materials Krivec S, Poljak M, Suligoj T |
120 - 125 |
Characterization of ultrathin-body Germanium-on-insulator (GeOI) structures and MOSFETs on flipped Smart-Cut (TM) GeOI substrates Yu X, Kang J, Zhang R, Takenaka M, Takagi S |
126 - 132 |
Resistive memory variability: A simplified trap-assisted tunneling model Garbin D, Vianello E, Rafhay Q, Azzaz M, Candelier P, DeSalvo B, Ghibaudo G, Perniola L |
133 - 139 |
Conduction barrier offset engineering for DRAM capacitor scaling Pesic M, Knebel S, Cho K, Jung C, Chang J, Lim H, Kolomiiets N, Afanas'ev VV, Mikolajick T, Schroeder U |
140 - 145 |
New high resolution Random Telegraph Noise (RTN) characterization method for resistive RAM Maestro M, Diaz J, Crespo-Yepes A, Gonzalez MB, Martin-Martinez J, Rodriguez R, Nafria M, Campabadal F, Aymerich X |
146 - 151 |
Impact of bias conditions on electrical stress and ionizing radiation effects in Si-based TFETs Ding LL, Gnani E, Gerardin S, Bagatin M, Driussi F, Selmi L, Le Royer C, Paccagnella A |
152 - 159 |
Experimental demonstration of strained Si nanowire GAA n-TFETs and inverter operation with complementary TFET logic at low supply voltages Luong GV, Strangio S, Tiedemannn A, Lenk S, Trellenkamp S, Bourdelle KK, Zhao QT, Mantl S |
160 - 166 |
Investigation of ambipolar signature in SiGeOI homojunction tunnel FETs Hutin L, Oeflein RP, Borrel J, Martinie S, Tabone C, Le Royer C, Vinet M |
167 - 172 |
Fabrication and electrical characterizations of SGOI tunnel FETs with gate length down to 50 nm Le Royer C, Villalon A, Hutin L, Martinie S, Nguyen P, Barraud S, Glowacki F, Allain F, Bernier N, Cristoloveanu S, Vinet M |
173 - 178 |
TCAD analysis of the leakage current and breakdown versus temperature of GaN-on-Silicon vertical structures Cornigli D, Monti F, Reggiani S, Gnani E, Gnudi A, Baccarani G |
179 - 184 |
A new latch-free LIGBT on SOI with very high current density and low drive voltage Olsson J, Vestling L, Eklund KH |
185 - 191 |
The role of cold carriers and the multiple-carrier process of Si-H bond dissociation for hot-carrier degradation in n- and p-channel LDMOS devices Sharma P, Tyaginov S, Jech M, Wimmer Y, Rudolf F, Enichlmair H, Park JM, Ceric H, Grasser T |
192 - 200 |
BIMOS transistor solutions for ESD protection in FD-SOI UTBB CMOS technology Galy P, Athanasiou S, Cristoloveanu S |
201 - 206 |
Properties and mechanisms of Z(2)-FET at variable temperature El Dirani H, Solaro Y, Fonteneau P, Ferrari P, Cristoloveanu S |
207 - 212 |
Spectral sensitivity of graphene/silicon heterojunction photodetectors Riazimehr S, Bablich A, Schneider D, Kataria S, Passi V, Yim C, Duesberg GS, Lemme MC |
213 - 218 |
Insights on the physics and application of off-plane quantum transport through graphene and 2D materials Iannaccone G, Zhang Q, Bruzzone S, Fiori G |
219 - 224 |
Comparison of self-heating and its effect on analogue performance in 28 nm bulk and FDSOI Makovejev S, Planes N, Haond M, Flandre D, Raskin JP, Kilchytska V |
225 - 231 |
Study of high-temperature Smart Cut (TM): Application to silicon-on-sapphire films and to thin foils of single crystal silicon Meyer R, Kononchuck O, Moriceau H, Lemiti M, Bruel M |
232 - 236 |
Impact of non uniform strain configuration on transport properties for FD14+devices Medina-Bailon C, Sampedro C, Gamiz F, Godoy A, Donetti L |
237 - 243 |
Second harmonic generation for contactless non-destructive characterization of silicon on insulator wafers Damianos D, Pirro L, Soylu G, Ionica I, Nguyen V, Vitrant G, Kaminski A, Blanc-Pelissier D, Onestas L, Changala J, Kryger M, Cristoloveanu S |