화학공학소재연구정보센터

Solid-State Electronics

Solid-State Electronics, Vol.88 Entire volume, number list
ISSN: 0038-1101 (Print) 

In this Issue (17 articles)

1 - 1 SELECTED EXTENDED PAPERS FROM ULIS 2012 CONFERENCE Foreword
[Anonymous]
2 - 8 High mobility CMOS technologies using III-V/Ge channels on Si platform
Takagi S, Kim SH, Yokoyama M, Zhang R, Taoka N, Urabe Y, Yasuda T, Yamada H, Ichikawa O, Fukuhara N, Hata M, Takenaka M
9 - 14 Influence of device architecture on junction leakage in low-temperature process FDSOI MOSFETs
Sklenard B, Batude P, Rafhay Q, Martin-Bragado I, Xu CQ, Previtali B, Colombeau B, Khaja FA, Cristoloveanu S, Rivallin P, Tavernier C, Poiroux T
15 - 20 Impact of local back biasing on performance in hybrid FDSOI/bulk high-k/metal gate low power (LP) technology
Fenouillet-Beranger C, Perreau P, Benoist T, Richier C, Haendler S, Pradelle J, Bustos J, Brun P, Tosti L, Weber O, Andrieu F, Orlando B, Pellissier-Tanon D, Abbate F, Richard C, Beneyton R, Gregoire M, Ducote J, Gouraud P, Margain A, Borowiak C, Bianchini R, Planes N, Gourvest E, Bourdelle KK, Nguyen BY, Poiroux T, Skotnicki T, Faynot O, Boeuf F
21 - 26 Investigating doping effects on high-kappa metal gate stack for effective work function engineering
Leroux C, Baudot S, Charbonnier M, Van Der Geest A, Caubet P, Toffoli A, Blaise P, Ghibaudo G, Martin F, Reimbold G
27 - 31 Substrate dependent mobility and strain effects for silicon and SiGe transistor channels with HKMG first stacks
Flachowsky S, Herrmann T, Hontschel J, Illgen R, Ong SY, Wiatr M
32 - 36 Scaling of high-kappa/metal-gate TriGate SOI nanowire transistors down to 10 nm width
Coquand R, Barraud S, Casse M, Leroux P, Vizioz C, Comboroure C, Perreau P, Ernst E, Samson MP, Maffini-Alvaro V, Tabone C, Barnola S, Munteanu D, Ghibaudo G, Monfray S, Boeuf F, Poiroux T
37 - 42 Investigation of electron mobility in surface-channel Al2O3/In0.53Ga0.47As MOSFETs
Negara MA, Djara V, O'Regan TP, Cherkaoui K, Burke M, Gomeniuk YY, Schmidt M, O'Connor E, Povey IM, Quinn AJ, Hurley PK
43 - 48 Impact of quantum effects on the short channel effects of III-V nMOSFETs in weak and strong inversion regimes
Dutta T, Rafhay Q, Clerc R, Lacord J, Monfray S, Pananakakis G, Boeuf F, Ghibaudo G
49 - 53 Investigation of localized versus uniform strain as a performance booster in InAs Tunnel-FETs
Conzatti F, Pala MG, Esseni D, Bano E
54 - 60 Calibrated multi-subband Monte Carlo modeling of tunnel-FETs in silicon and III-V channel materials
Revelant A, Palestri P, Osgnach P, Semi L
61 - 64 Characteristics control of room-temperature operating single electron transistor with floating gate by charge pump circuit
Nozue M, Suzuki R, Nomura H, Saraya T, Hiramoto T
65 - 68 Downscaling ferroelectric field effect transistors by using ferroelectric Si-doped HfO2
Martin D, Yurchuk E, Muller S, Muller J, Paul J, Sundquist J, Slesazeck S, Schlosser T, van Bentum R, Trentzsch M, Schroder U, Mikolajick T
69 - 72 Numerical simulation and modeling of thermal transient in silicon power devices
Magnone P, Fiegna C, Greco G, Bazzano G, Rinaudo S, Sangiorgi E
73 - 81 Surface potential compact model for embedded flash devices oriented to IC memory design
Garetto D, Rideau D, Gilibert F, Schmid A, Jaouen H, Leblebici Y
82 - 88 Numerical and analytical models to investigate the AC high-frequency response of nanoelectrode/SAM/electrolyte capacitive sensing elements
Pittino F, Selmi L, Widdershoven F
89 - 94 Pressure sensors based on suspended graphene membranes
Smith AD, Vaziri S, Niklaus F, Fischer AC, Sterner M, Delin A, Ostling M, Lemme MC