1 - 8 |
Optimized design of Si-cap layer in strained-SiGe channel p-MOSFETs based on computational and experimental approaches Sato-Iwanaga J, Inoue A, Sorada H, Takagi T, Rothschild A, Loo R, Biesemans S, Ito C, Liu Y, Dutton RW, Tsuchiya H |
9 - 12 |
Performance improvement of oxide thin-film transistors with a two-step-annealing method Li M, Lan LF, Xu M, Xu H, Luo DX, Xiao P, Peng JB |
13 - 18 |
Backgating effect in III-V MESFET's: A physical model Manifacier JC, Ardebili R |
19 - 23 |
High voltage InAlN/GaN HEMTs with nonalloyed Source/Drain for RF power applications Zhou Q, Yang S, Chen WJ, Zhang B, Feng ZH, Cai SJ, Chen KJ |
24 - 27 |
Enhanced seebeck coefficient for a compressive n-type polysilicon film Kang TK |
28 - 35 |
Comparative study of NSB and UTB SOI MOSFETs characteristics by extraction of series resistance Karsenty A, Chelly A |
36 - 43 |
Automatic TCAD model calibration for multi-cellular Trench-IGBTs Maresca L, Breglio G, Irace A |
44 - 52 |
Modeling of sheet carrier density and microwave frequency characteristics in Spacer based AlGaN/AlN/GaN HEMT devices Mohanbabu A, Anbuselvan N, Mohankumar N, Godwinraj D, Sarkar CK |
53 - 58 |
Advantages of different source/drain engineering on scaled UTBOX FDSOI nMOSFETs at high temperature operation Nicoletti T, dos Santos SD, Martino JA, Aoulaiche M, Veloso A, Jurczak M, Simoen E, Claeys C |
59 - 66 |
Computational analysis of breakdown voltage enhancement for AlGaN/GaN HEMTs through optimal pairing of deep level impurity density and contact design DasGupta S, Baca AG, Cich MJ |
67 - 73 |
Evaluation of voltage vs. pulse width modulation and feedback during set/reset verify-programming to achieve 10 million cycles for 50 nm HfO2 ReRAM Higuchi K, Takeuchi K, Iwasaki TO |
74 - 77 |
Cryogenic noise performance of InGaAs/InAlAs HEMTs grown on InP and GaAs substrate Schleeh J, Rodilla H, Wadefalk N, Nilsson PA, Grahn J |
78 - 80 |
Avalanche breakdown in SOI MESFETs Lepkowski W, Wilk SJ, Parsi A, Saraniti M, Ferry D, Thornton TJ |
81 - 86 |
A defect-based compact modeling approach for the reliability of CMOS devices and integrated circuits Esqueda IS, Barnaby HJ |
87 - 90 |
Analysis of temperature dependent hysteresis in MoS2 field effect transistors for high frequency applications Shah PB, Amani M, Chin ML, O'Regan TP, Crowne FJ, Dubey M |
91 - 99 |
Proximity gettering of slow diffuser contaminants in CMOS image sensors Russo F, Moccia G, Nardone G, Alfonsetti R, Polsinelli G, D'Angelo A, Patacchiola A, Liverani M, Pianezza P, Lippa T, Carlini M, Polignano ML, Mica I, Cazzini E, Ceresoli M, Codegoni D |
100 - 105 |
Corner induced non-uniform electric field effect on the electrical reliability of metal-oxide-semiconductor devices with non-planar substrates Tseng PH, Hwu JG |
106 - 111 |
Effect of annealing on the electrical properties of insulating aluminum nitride in MIM and MIS structures Ortiz CR, Pantojas VM, Otano-Rivera W |
112 - 117 |
Modeling the voltage nonlinearity of high-k MIM capacitors Kannadassan D, Karthik R, Baghini MS, Mallick PS |
118 - 122 |
Study of charge loss mechanisms for nano-sized localized trapping SONOS memory devices Xu Y, Yue H, Zhao FF |
123 - 126 |
Experimental study of back gate bias effect and short channel effect in ultra-thin buried oxide tri-gate nanowire MOSFETs Ota K, Saitoh M, Tanaka C, Numata T |
127 - 129 |
Effect of body bias on negative bias temperature instability in pMOSFET with SiON gate dielectrics Kim H, Roh Y |
130 - 136 |
Effect of load current density during the production of Cu2O/Cu solar cells by anodic oxidation on film quality and output power Hasuda K, Takakuwa O, Soyama H |
137 - 146 |
MASTAR VA: A predictive and flexible compact model for digital performances evaluation of CMOS technology with conventional CAD tools Lacord J, Ghibaudo G, Boeuf F |
147 - 151 |
Quantum simulation study of single halo dual-material gate CNTFETs Wang W, Li N, Xia CP, Xiao GR, Ren YZ, Li H, Zheng LF, Li J, Jiang JJ, Chen XP, Wang K |