Solid-State Electronics

Solid-State Electronics, Vol.45, No.1 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (28 articles)

7 - 12	Channel engineering using RTA prior to the gate oxidation for high density DRAM with single gate CMOS technology Son JH, Lee SH, Lee JS, Lee Y
13 - 17	Inductively coupled high-density plasma-induced etch damage of GaN MESFETs Shul RJ, Zhang L, Baca AG, Willison CG, Han J, Pearton SJ, Lee KP, Ren F
19 - 25	Current model considering oxide thickness non-uniformity in a MOS tunnel structure Vexler MI, Shulekin AF, Dieker C, Zaporojtschenko V, Zimmermann H, Jager W, Grekhov IV, Seegebrecht P
27 - 33	Emitter structure of power heterojunction bipolar transistor for enhancement of thermal stability Lee JG, Oh TK, Kim B, Kang BK
35 - 40	Comparison of MOSFET-threshold-voltage extraction methods Terada K, Nishiyama K, Hatanaka K
41 - 46	Ultimate parameters of Hg1-xCdxTe and InAs1-xSbx n(+)-p photodiodes Niedziela T, Ciupa R
47 - 51	Electrical characterization of ONO triple dielectric in SONOS nonvolatile memory devices Bu JK, White MH
53 - 58	A'channel' design using single, semiconductor nanocrystals for efficient (opto)electronic devices Salafsky JS
59 - 62	Thermal effect on electromigration performance for Al/SiO2, Cu/SiO2 and Cu/low-K interconnect systems Wu W, Kang SH, Yuan JS, Oates AS
63 - 69	Experimental investigation of factors influencing design of small-signal CMOS amplifiers Vernon E, Bryson D, Motayed A, Mohammad SN
71 - 77	The 6.5 kV clustered insulated gate bipolar transistor in homogeneous base technology Luther-King N, Sweet M, Spulber O, Vershinin K, Ngw CK, Bose SC, De Souza MM, Narayanan EMS
79 - 85	Analytical model of three-dimensional effect on voltage and edge peak field distributions and optimal space for planar junction with a single field limiting ring He J, Huang R, Zhang X, Wang YY, Chen XB
87 - 93	Low dark current far infrared detector with an optical cavity architecture Korotkov AL, Perera AGU, Shen WZ, Liu HC, Buchanan M
95 - 100	Analysis of surface and interface charge interactions in silicon on insulator (SOI) substrates Lukasiak L, Roman P, Jakubowski A, Ruzyllo J
101 - 105	Physical parameters of the quantum mechanical interference method for the determination of oxide thickness in MOS devices Katto H
107 - 112	Impact of gamma irradiation on the RF phase noise capability of UHV/CVD SiGeHBTs Niu GF, Juraver JB, Borgarino M, Jin ZR, Cressler JD, Plana R, Llopis O, Mathew S, Zhang SM, Clark S, Joseph AJ
113 - 120	Design considerations in scaled SONOS nonvolatile memory devices Bu JK, White MH
121 - 125	Effect of rapid-thermal-annealed TiN barrier layer on the Pt/BST/Pt capacitors prepared by RF magnetron co-sputter technique at low substrate temperature Hwang CC, Juang MH, Lai MJ, Jaing CC, Chen JS, Huang S, Cheng HC
127 - 132	Monolithic integration of low voltage devices in 3 kV planar MOS controlled power devices Ngw CK, Sweet M, Bose JVSC, Spulber O, King NL, Vershinin K, De Souza MM, Narayanan EMS
133 - 141	Electrical transport characteristics of Au/n-GaAs Schottky diodes on n-Ge at low temperatures Hudait MK, Venkateswarlu P, Krupanidhi SB
143 - 148	Extraction of Schottky diode parameters with a bias dependent barrier height Mikhelashvili V, Eisenstein G, Uzdin R
149 - 158	Barrier capability of TaNx films deposited by different nitrogen flow rate against Cu diffusion in Cu/TaNx/n(+)-p junction diodes Yang WL, Wu WF, Liu DG, Wu CC, Ou KL
159 - 167	An analytical model for space-charge region capacitance based on practical doping profiles under any bias conditions Ma PX, Linder M, Sanden M, Zhang SL, Ostling M, Chang MCF
169 - 172	A process simplification scheme for fabricating self-aligned silicided trench-gate power MOSFETs Juang MH, Sun LC, Chen WT, Ou-Yang CI
173 - 182	A dynamic n-buffer insulated gate bipolar transistor Huang S, Sheng K, Udrea F, Amaratunga GAJ
183 - 191	The breakdown voltage of unguarded and field plate guarded silicon detector diodes Beck GA, Carter AA, Carter JR, Greenwood NM, Lucas AD, Munday DJ, Pritchard TW, Robinson D, Wilburn CD, Wyllie KH
193 - 197	A physically-based semi-empirical effective mobility model for MOSFET compact I-V modeling Lim KY, Zhou X
199 - 203	A novel multi-level interconnect scheme with air as low K inter-metal dielectric for ultradeep submicron application Chen CH, Fang YK, Lin CS, Yang CW, Hsieh JC