Solid-State Electronics

Solid-State Electronics, Vol.51, No.4 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (19 articles)

517 - 517	Papers selected from the 2006 ULIS Conference - Foreword Deleonibus S
518 - 525	A perspective on today's scaling challenges and possible future directions Dennard RH, Cai J, Kumar A
526 - 536	Device structures and carrier transport properties of advanced CMOS using high mobility channels Takagi S, Tezuka T, Irisawa T, Nakaharai S, Numata T, Usuda K, Sugiyama N, Shichijo M, Nakane R, Sugahara S
537 - 542	Experimental determination of the channel backscattering coefficient on 10-70 nm-metal-gate, Double-Gate transistors Barral V, Poiroux T, Vinet M, Widiez J, Previtali B, Grosgeorges P, Le Carval G, Barraud S, Autran JL, Munteanu D, Deleonibus S
543 - 550	Device performance and optimization of decananometer long double gate MOSFET by Monte Carlo simulation Bournel A, Aubry-Fortuna V, Saint-Martin J, Dollfus P
551 - 559	Impact of fin width on digital and analog performances of n-FinFETs Subramanian V, Mercha A, Parvais B, Loo J, Gustin C, Dehan M, Collaert N, Jurczak M, Groeseneken G, Sansen W, Decoutere S
560 - 564	Capacitance measurements in nanometric silicon devices using Coulomb blockade Hofheinz M, Jehl X, Sanquer M, Cueto O, Molas G, Vinet M, Deleonibus S
565 - 571	CMOS 6-T SRAM cell design subject to''atomistic" fluctuations Cheng B, Roy S, Asenov A
572 - 578	Impact of the dimensionality on the performance of tunneling FETs: Bulk versus one-dimensional devices Knoch J, Mantl S, Appenzeller J
579 - 584	Comparative study of the fabricated and simulated Impact Ionization MOS (IMOS) Mayer F, Le Royer C, Le Carval G, Tabone C, Claveller L, Deleonibus S
585 - 592	Extraction of the gate capacitance coupling coefficient in floating gate non-volatile memories: Statistical study of the effect of mismatching between floating gate memory and reference transistor in dummy cell extraction methods Rafhay Q, Beug MF, Duane R
593 - 597	Phonon scattering in Si-based nanodevices Donetti L, Gamiz F, Rodriguez N, Ruiz FG
598 - 603	A new analytical model for the energy dispersion in two-dimensional hole inversion layers De Michielis M, Esseni D, Palestri P, Selmi L
604 - 610	Monte-Carlo analysis of signal propagation delay and AC performance of decananometric bulk and double-gate MOSFETs Barin N, Palestri P, Fiegna C
611 - 616	Combined sources of intrinsic parameter fluctuations in sub-25 nm generation UTB-SOI MOSFETs: A statistical simulation study Samsudin K, Adamu-Lerna F, Brown AR, Roy S, Asenov A
617 - 621	Investigation of MOS capacitors and SOI-MOSFETs with epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) electrodes Echtermeyer T, Gottlob HDB, Wahlbrink T, Mollenhauer T, Schmidt M, Efavi JK, Lemme MC, Kurz H
622 - 626	Navigation aids in the search for future high-k dielectrics: Physical and electrical trends Engstrom O, Raeissi B, Hall S, Buiu O, Lemme MC, Gottlob HDB, Hurley PK, Cherkaoui K
627 - 632	Impact of the gate-electrode/dielectric interface on the low-frequency noise of thin gate oxide n-channel metal-oxide-semiconductor field-effect transistors Claeys C, Simoen E, Srinivasan P, Misra D
633 - 637	Low frequency noise in biaxially strained silicon n-MOSFETs with ultrathin gate oxides Contaret T, Touati B, Ghibaudo G, Boeuf F, Skotnicki T