887 - 894 |
A novel approach to charge-based non-quasi-static model of the MOS transistor valid in all modes of operation Sallese JM, Porret AS |
895 - 903 |
A general bulk-limited transport analysis of a 10 nm-thick oxide stress-induced leakage current De Salvo B, Ghibaudo G, Pananakakis G, Guillaumot B, Reimbold G |
905 - 912 |
Improved analytical modeling of polysilicon depletion in MOSFETs for circuit simulation Sallese JM, Bucher M, Lallement C |
913 - 916 |
Grain and grain-boundary control of the transfer characteristics of large-grain polycrystalline silicon thin-film transistors Farmakis FV, Brini J, Kamarinos G, Angelis CT, Dimitriadis CA, Miyasaka M, Ouisse T |
917 - 922 |
Graded-channel fully depleted Silicon-On-Insulator nMOSFET for reducing the parasitic bipolar effects Pavanello MA, Martino JA, Flandre D |
923 - 927 |
The formation of stable ohmic contacts to MBE grown CdTe layers Yousaf M, Sands D, Scott CG |
929 - 935 |
The integration of high-side and low-side LIGBTs on partial silicon-on-insulator Garner DM, Udrea F, Lim HT, Milne WI |
937 - 940 |
Germanium junction field effect transistor for cryogenic applications Das NC, Monroy C, Jhabvala M |
941 - 947 |
Large-signal microwave performance of GaN-based NDR diode oscillators Alekseev E, Pavlidis D |
949 - 958 |
Charge retention of scaled SONOS nonvolatile memory devices at elevated temperatures Yang YL, White MH |
959 - 962 |
An accurate relationship for determining the key parameters of MOSFETs by proportional difference operator method Wang JY, Xu MZ, Tan CH |
963 - 967 |
Evaluation of transport properties of ozonized poly/mono interfaces in polysilicon emitter bipolar transistors Niel S, Chantre A, Llinares P, Laurens M, Vincent G |
969 - 976 |
Device parameters extracted in the linear region of MOSFET by comparing with the exact gradual channel model Katto H |
977 - 980 |
Stress-induced high-field gate leakage current in ultra-thin gate oxide Wei JL, Mao LF, Xu MZ, Tan CH, Duan XR |
981 - 989 |
Aspect ratio calculation in n-channel MOSFETs with a gate-enclosed layout Giraldo A, Paccagnella A, Minzoni A |
991 - 1000 |
A Gummel-Poon model for pnp heterojunction bipolar transistors with a compositionally graded base Datta S, Roenker KP, Cahay MM |
1001 - 1007 |
Technology CAD based statistical simulation of MOSFETs Shigyo N, Wakita N, Morishita T, Sugawara K, Asahi Y |
1009 - 1012 |
Circuit model for traveling wave semiconductor laser amplifiers Chen WY, Wang AJ, Zhang YJ, Liu CX, Liu SY |
1013 - 1019 |
Complex random telegraph signals in 0.06 mu m(2) MDD n-MOSFETs Amarasinghe NV, Celik-Butler Z |
1021 - 1027 |
The indium content in metamorphic InxAl1-xAs/InxGa1-xAs HEMTs on GaAs substrate: a new structure parameter Bollaert S, Cordier Y, Zaknoune M, Happy H, Hoel V, Lepilliet S, Theron D, Cappy A |
1029 - 1034 |
Electrical characterization of Si/Si1-xGex/Si quantum well heterostructures using a MOS capacitor Maikap S, Bera LK, Ray SK, John S, Banerjee SK, Maiti CK |
1035 - 1042 |
A simulation study on the DC characteristics of the Ga0.52In0.48P/In0.2Ga0.8As/Ca0.52In0.48P double heterojunction pseudomorphic high electron mobility transistor Yoon SF, Kam AHT, Gay BP, Zheng HQ |
1043 - 1047 |
Conditions of ion implantation into thin amorphous Si gate layers for suppressing threshold voltage shift Suzuki K, Sudo R |
1049 - 1053 |
A novel resonant tunneling base transistor with bi-directional negative-differential-resistance phenomena Tsai JH |
1055 - 1058 |
Luminescence of an InGaN/GaN multiple quantum well light-emitting diode Sheu JK, Chi GC, Su YK, Liu CC, Chang CM, Hung WC, Jou MJ |
1059 - 1067 |
Proportional difference operator method and its application in studying subthreshold behavior of MOSFETs Tan CH, Xu MZ, Wang Z |
1069 - 1075 |
Levelized incomplete LU method and its application to semiconductor device simulation Tsai YT, Lee CY, Tsai MK |
1077 - 1080 |
Impact of gate workfunction on device performance at the 50 nm technology node De I, Johri D, Srivastava A, Osburn CM |
1081 - 1087 |
Transconductance of large grain excimer laser-annealed polycrystalline silicon thin film transistors Angelis CT, Dimitriadis CA, Farmakis FV, Brini J, Kamarinos G, Miyasaka M, Stoemenos I |
1089 - 1097 |
Effects of thin oxide in metal-semiconductor and metal-insulator-semiconductor epi-GaAs Schottky diodes Hudait MK, Krupanidhi SB |
1099 - 1104 |
Magnetoelectronic latching Boolean gate Johnson M, Bennett BR, Hammar PR, Miller MM |
1105 - 1109 |
Verification of overlap and fringing capacitance models for MOSFETs Wakita N, Shigyo N |
1111 - 1116 |
Characteristics of an epitaxial Schottky barrier diode for all levels of injection Hassan MMS |
1117 - 1119 |
Hot carrier reliability characteristics of a bend-gate MOSFET Lee W, Hwang H |
1121 - 1125 |
Channel and well design of quarter-micron high performance retrograde well pMOSFETs Toe-Naing S, Kiat-Seng Y |