This paper reports the integration of SiGe heterojunction bipolar transistors (HBTs) in an industrial 200 mm, 0.5 mu m BiCMOS process. The bipolar transistors of this technology have a single polysilicon quasi-self-aligned structure. The epitaxy of the emitter-base system, grown selectively in the bipolar active regions, was inserted into the standard process with minimum modification. During the epitaxy realized in an industrial, 200 mm, CVD module operating at reduced pressure, the MOS devices and the collector were protected by a thin oxide layer. No lithography step was added. The overall thermal budget was only slightly lowered. It was verified that the performance of the MOS device was not degraded by these modifications. The results presented here were obtained on HBTs with a gradual Ge content (from 10% on the collector side to 5% on the emitter side) and a collector doped at 10(17) cm(-3). The nominal HBT (0.6 x 1.2 mu m(2) emitter area) shows a maximum gain of 140, early voltage of 60 V, BVCED of 3.6 V and maximum f(tau) of 29 GHz. This work is a first step towards an optimized HBT-CMOS technology.