Today, numerous different PVD techniques are used for the filling of sub micron contacts and vias in ULSI devices. One of the most promising approaches is the Al-reflow process. In this process, voids in vias which form during the PVD deposition of Al are eliminated by the thermal diffusion of Al. The ability of the aluminum to diffuse into the voids becomes increasingly dependent on the temperature of the reflow steps as device dimensions decrease. Therefore, it becomes necessary to deposit the Al at high temperatures, with the risk to influence the electrical properties of other underlying metal films and roughen the metal surface due to larger grain sizes. In this paper, the effect of the Al-deposition temperature on contact/sheet resistance and short yield of the deposited film and the influence of high temperature Al depositions on the electrical properties of underneath lying metal stacks are investigated.