Fundamental limitations to oxide reliability are analyzed in silicon carbide based devices. A barrier height primarily determined by band offsets between metal/SiC and the dielectric, and the electric field in the dielectric results in tunneling current into the dielectric, resulting in its degradation. Since band offsets for SiC to most dielectrics are smaller than those with respect to Si, a lower reliability is expected for SiC-dielectric based devices as compared to Si MOS devices. Other researchers have correlated interface states in the SiC-oxide as tunneling sites that increase gate leakage currents and influence the barrier to tunneling. Depending on the allowed maximum electric field in the gate oxide, there exists a trade-off between on-state resistance and SiC MOS reliability. (C) 2004 Elsevier Ltd. All rights reserved.