Solid-State Electronics

Solid-State Electronics, Vol.49, No.11 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (23 articles)

1713 - 1713	Papers Selected From The IST International Conference On Memory Technology And Design - ICMTD'05 Introduction Gerritsen E, Masson P, Mazoyer P
1714 - 1721	Memory technology in mobile devices - status and trends Vihmalo JP, Lipponen V
1722 - 1727	Influence of silicon nanocrystal size and density on the performance of non-volatile memory arrays Rao RA, Gasquet HP, Steimle RF, Rinkenberger G, Straub S, Muralidhar R, Anderson SGH, Yater JA, Ledezma JC, Hamilton J, Acred B, Swift CT, Hradsky B, Peschke J, Sadd M, Prinz EJ, Chang KM, White BE
1728 - 1733	Single-electron phenomena in ultra-scaled floating-gate devices and their impact on electrical characteristics Deleruyelle D, Molas G, DeSalvo B, Gely M, Lafond D
1734 - 1744	Si nanocrystals by ultra-low-energy ion beam-synthesis for non-volatile memory applications Bonafos C, Coffin H, Schamm S, Cherkashin N, Ben Assayag G, Dimitrakis P, Normand P, Carrada M, Paillard V, Claverie A
1745 - 1753	Modelling and simulation of charging and discharging processes in nanocrystal flash memories during program and erase operations Campera A, Iannaccone G
1754 - 1758	A model for the channel potential of charge-trapping memories and its implications for device scaling Sadd M, Anderson SGH, Hradsky B, Muralidhar R, Prinz EJ, Rao R, Straub S, Steimle RF, Swift CT, White BE, Yater JA
1759 - 1766	Modelling of the 1T-Bulk capacitor-less DRAM cell with improved performances: The way to scaling Ranica R, Villaret A, Malinge P, Candelier P, Masson P, Bouchakour R, Mazoyer P, Skotnicki T
1767 - 1775	Evolution of materials technology for stacked-capacitors in 65 nm embedded-DRAM Gerritsen E, Emonet N, Caillat C, Jourdan N, Piazza M, Fraboulet D, Boeck B, Berthelot A, Smith S, Mazoyer P
1776 - 1782	A small granular controlled leakage reduction system for SRAMs Geens P, Dehaene W
1783 - 1790	Alpha-particle-induced SER of embedded SRAMs affected by variations in process parameters and by the use of process options Heijmen T, Kruseman B
1791 - 1798	A system-level approach for embedded memory robustness Mariani R, Boschi G
1799 - 1804	NVM based on FinFET device structures Hofmann F, Specht M, Dorda U, Kommling R, Dreeskornfeld L, Kretz J, Stadele M, Rosner W, Risch L
1805 - 1812	3D simulation study of gate coupling and gate cross-interference in advanced floating gate non-volatile memories Ghetti A, Bortesi L, Vendrame L
1813 - 1819	A macro model of programmable metallization cell devices Gilbert NE, Gopalan C, Kozicki MN
1820 - 1825	Organic electrically bistable materials for non-volatile memory applications Pirovano A, Sotgiu R, Conoci S, Petralia S, Buonocore F
1826 - 1832	Switching and programming dynamics in phase-change memory cells Ielmini D, Mantegazza D, Lacaita AL, Pirovano A, Pellizzer F
1833 - 1840	Investigation of SiO2/HfO2 gate stacks for application to non-volatile memory devices Buckley J, De Salvo B, Ghibaudo G, Gely M, Damlencourt JF, Martin F, Nicotra G, Deleonibus S
1841 - 1848	Scaling down the interpoly dielectric for next generation - Flash memory: Challenges and opportunities Govoreanu B, Brunco DP, Van Houdt J
1849 - 1856	Low voltage and low power embedded 2T-SONOS flash memories improved by using P-type devices and high-K materials van Schaijk R, Slotboom M, van Duuren M, Dormans D, Akil N, Beurze R, Neuilly F, Baks W, Miranda AH, Tello PG
1857 - 1861	Fully compatible novel SNONOS structure for improved electrical performance in NAND Flash memories Han JH, Kim JH, Lee SH, Kim C
1862 - 1866	Scaling effects in dual-bit split-gate nitride memory devices Breuil L, Haspeslagh L, Lorenzini M, De Vos J, Van Houdt J
1867 - 1874	Design of high-speed 128-bit embedded flash memories allowing in place execution of the code Combe M, Papaix C, Guichaoua J, Sialelli V, Racape E, Daga JM