Solid-State Electronics

Solid-State Electronics, Vol.51, No.11-12 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (30 articles)

1425 - 1425	Solid-state electronics special issue foreword Ionescu AM, Leblebici Y
1426 - 1431	Research directions in beyond CMOS computing Bourianoff GI, Gargini PA, Nikonov DE
1432 - 1436	Superior N- and P-MOSFET scalability using carbon co-implantation and spike annealing Augendre E, Pawlak BJ, Kubicek S, Hoffmann T, Chiarella T, Kerner C, Severi S, Falepin A, Ramos J, De Keersgieter A, Eyben P, Vanhaeren D, Vandervorst W, Jurczak M, Absil P, Biesemans S
1437 - 1443	A high performance pMOSFET with two-step recessed SiGe-S/D structure for 32 nm node and beyond Yasutake N, Azuma A, Ishida T, Ohuchi K, Aoki N, Kusunoki N, Mori S, Mizushima I, Morooka T, Kawanaka S, Toyoshima Y
1444 - 1449	Carrier backscattering characteristics of strained silicon-on-insulator n-MOSFETs featuring silicon-carbon source/drain regions Ang KW, Chin HC, Chui KJ, Li MF, Samudra GS, Yeo YC
1450 - 1457	High threshold voltage matching performance on gate-all-around MOSFET Cathignol A, Cros A, Harrison S, Cerrutti R, Coronel P, Pouydebasque A, Rochereau K, Skotnicki T, Ghibaudo G
1458 - 1465	Experimental evidence and extraction of the electron mass variation in [110] uniaxially strained MOSFETs Rochette F, Casse M, Mouis M, Reimbold G, Blachier D, Leroux C, Guillaumot B, Boulanger F
1466 - 1472	Reduction of gate-to-channel tunneling current in FinFET structures Rudenko T, Kilchytska V, Collaert N, Jurczak M, Nazarov A, Flandre D
1473 - 1478	Quantifying self-heating effects with scaling in globally strained Si MOSFETs Agaiby R, Yang Y, Olsen SH, O'Neill AG, Eneman G, Verheyen P, Loo R, Claeys C
1479 - 1484	CMOS compatible dual metal gate integration with successful V-th adjustment on high-k HfTaON by high-temperature metal intermixing Ren C, Chan DSH, Loh WY, Lo GQ, Balasubramanian N, Kwong DL
1485 - 1493	Modeling of MOSFET parasitic capacitances, and their impact on circuit performance Mueller J, Thoma R, Demircan E, Bernicot C, Juge A
1494 - 1499	Experimental evidence of mobility enhancement in short-channel ultra-thin body double-gate MOSFETs by magnetoresistance technique Chaisantikulwat W, Mouis M, Ghibaudo G, Cristoloveanu S, Widiez J, Vinet M, Deleonibus S
1500 - 1507	Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric Boucart K, Ionescu AM
1508 - 1514	Germanium FETs and capacitors with rare earth CeO2/HfO2 gates Dimoulas A, Panayiotatos Y, Sotiropoulos A, Tsipas P, Brunco DP, Nicholas G, Van Steenbergen J, Bellenger F, Houssa M, Caymax M, Meuris M
1515 - 1522	A systematic investigation of work function in advanced metal gate-HfO2-SiO2 structures with bevel oxide Kuriyama A, Mitard J, Faynot O, Brevard L, Clerc L, Tozzo A, Vidal V, Deleonibus S, Iwai H, Cristoloveanu S
1523 - 1528	A novel channel-program-erase technique with substrate transient hot carrier injection for SONOSNAND flash application Hsu TH, King YC, Wu JY, Shih YH, Lue HT, Lai EK, Hsieh KY, Liu R, Lu CY
1529 - 1533	New TIT capacitor with ZrO2/Al2O3/ZrO2 dielectrics for 60 nm and below DRAMs Cho HJ, Kim YD, Park DS, Lee E, Park CH, Jang JS, Lee KB, Kim HW, Ki YJ, Han K, Song YW
1534 - 1539	DRAM retention tail improvement by trap passivation Weber A, Birner A, Krautschnelder W
1540 - 1546	Investigation of hafnium-aluminate alloys in view of integration as interpoly dielectrics of future Flash memories Molas G, Bocquet M, Buckley J, Grampeix H, Gely M, Colonna JP, Licitra C, Rochat N, Veyront T, Garros X, Martin F, Brianceau P, Vidal V, Bongiorno C, Lombardo S, De Salvo B, Deleonibus S
1547 - 1551	VDNROM: A novel four-physical-bits/cell vertical channel dual-nitride-trapping-layers ROM for high density flash memory applications Zhou F, Cai Y, Huang R, Li Y, Shan X, Liu J, Guo A, Zhang X, Wang Y
1552 - 1557	Single-electron random-number generator (RNG) for highly secure ubiquitous computing applications Uchida K, Tanamoto T, Fujita S
1558 - 1564	Monte-Carlo simulation of decananometric nMOSFETs: Multi-subband vs. 3D-electron gas with quantum corrections Riolino I, Braccioli M, Lucci L, Palestri P, Esseni D, Fiegna C, Selmi L
1565 - 1571	Geometry optimization for carbon nanotube transistors Pourfath M, Kosina H, Selberherr S
1572 - 1580	An industrial view on compact modeling Woltjer R, Tiemeijer L, Klaassen D
1581 - 1588	An EKV-based high voltage MOSFET model with improved mobility and drift model Chauhan YS, Gillon R, Bakeroot B, Krummenacher F, Declercq M, Ionescu AM
1589 - 1595	Power Trench MOSFETs with very low specific on-resistance for 25 V applications Goarin P, van Dalen R, Koops G, Le Cam C
1596 - 1608	One and two port piezoelectric higher order contour-mode MEMS resonators for mechanical signal processing Piazza G, Stephanou PJ, Pisano AP
1609 - 1617	Modeling and system-level simulation of a CMOS convective accelerometer Leman O, Chaehoi A, Mailly F, Latorre L, Nouet P
1618 - 1623	Bandgap engineering in Alq(3)- and NPB-based organic light-emitting diodes for efficient green, blue and white emission Divayana Y, Sun XW, Chen BJ, Lo GQ, Sarma KR, Kwong DL
1624 - 1628	High pass filter with above IC integrated SrTiO3 high K MIM capacitors Defay E, Wolozan D, Blanc JP, Serret E, Garrec P, Verrun S, Pellissier D, Delpech P, Guillan J, Andre B, Ulmer L, Aid M, Ancey P