1 - 4 |
Effects of post-oxidation on leakage current of high-voltage AlGaN/GaN Schottky barrier diodes on Si(111) substrates Ha MW, Han MK, Hahn CK |
5 - 7 |
Design of emitter ledge for thermal stability of AlGaAs/GaAs heterojunction bipolar transistors Lim HW, Baek CH, Kang BK |
8 - 12 |
The effect of different dicing methods on the leakage currents of n-type silicon diodes and strip sensors Christophersen M, Fadeyev V, Ely S, Phlips BF, Sadrozinski HFW |
13 - 18 |
Analysis of temperature effect on a-Si:H thin film transistors Qiang L, Yao RH |
19 - 26 |
Room temperature analysis of Ge p(+)/n diodes reverse characteristics fabricated by platinum assisted dopant activation Ioannou-Sougleridis V, Poulakis N, Dimitrakis P, Normand P, Patsis GP, Dimoulas A, Simoen E |
27 - 31 |
Off-state avalanche-breakdown-induced on-resistance degradation in SGO-NLDMOS Zhang SF, Han Y, Ding KB, Hu JX, Zhang B, Zhang W, Wu HT |
32 - 34 |
Effects of geometry parameters of NTFET devices on the I-V measurements Justino CIL, Rocha-Santos TAP, Amaral JP, Cardoso S, Duarte AC |
35 - 44 |
Numerical simulation and characterization of trapping noise in InGaP-GaAs heterojunctions devices at high injection Nallatamby JC, Abdelhadi K, Jacquet JC, Prigent M, Floriot D, Delage S, Obregon J |
45 - 50 |
Solution based-spin cast processed organic bistable memory device Ramana CVV, Moodley MK, Kannan V, Maity A |
51 - 57 |
Study of charge trapping characteristics of SONOS with various trapping layers using gate-sensing and channel-sensing (GSCS) method Liao JH, Lin HJ, Lue HT, Du PY, Hsieh JY, Yang LW, Yang T, Chen KC, Lu CY |
58 - 62 |
Effects of channel width variation on electrical characteristics of tri-gate Junction less transistors Jeon DY, Park SJ, Mouis M, Barraud S, Kim GT, Ghibaudo G |
63 - 67 |
Effect of two yellow delta-emitting layers on device performance of phosphorescent white organic light-emitting devices Zhao J, Yu JS, Wang X, Zhang L |
68 - 71 |
High efficiency and high power continuous-wave semiconductor terahertz lasers at similar to 3.1 THz Liu JQ, Chen JY, Wang T, Li YF, Liu FQ, Li L, Wang LJ, Wang ZG |
72 - 77 |
Electrical properties of n-Zn0.94Cd0.06O/p-SiC heterostructures Shtepliuk I, Khranovskyy V, Lashkarev G, Khomyak V, Lazorenko V, Ievtushenko A, Syvajarvi M, Jokubavicius V, Yakimova R |
78 - 85 |
x10 Fast write, 80% energy saving temperature controlling set method for multi-level cell phase change memories to solve the scaling blockade Johguchi K, Shintani T, Morikawa T, Yoshioka K, Takeuchi K |
86 - 90 |
Transfer-free grown bilayer graphene transistors for digital applications Wessely PJ, Wessely F, Birinci E, Riedinger B, Schwalke U |
91 - 100 |
Improved empirical non-linear compact model for studying intermodulation in HEMTs and LDMOSFETs Sadi T, Schwierz F |
101 - 104 |
Low-frequency noise behavior of junctionless transistors compared to inversion-mode transistors Jeon DY, Park SJ, Mouis M, Barraud S, Kim GT, Ghibaudo G |
105 - 112 |
Analytical modeling of surface accumulation behavior of fully depleted SOI four gate transistors (G(4)-FETs) Sayed S, Khan MZR |
113 - 118 |
A new method for the extraction of flat-band voltage and doping concentration in Tri-gate Junctionless Transistors Jeon DY, Park SJ, Mouis M, Barraud S, Kim GT, Ghibaudo G |
119 - 123 |
Effect of surface preparation on the radiation hardness of high-dielectric constant gate dielectric Tsui BY, Su TT, Shew BY, Huang YT |
124 - 129 |
Temperature dependent compact modeling of gate tunneling leakage current in double gate MOSFETs Darbandy G, Aghassi J, Sedlmeir J, Monga U, Garduno I, Cerdeira A, Iniguez B |
130 - 134 |
Measurement of effective carrier lifetime at the semiconductor-dielectric interface by Photoconductive Decay (PCD) Method Drummond PJ, Bhatia D, Ruzyllo J |
135 - 139 |
Comparison between TCAD simulated and measured carrier lifetimes in CMOS photodiodes using the Open Circuit Voltage Decay method Marcelot O, Magnan P |
140 - 143 |
Effects of the solvent polarity of a polymeric insulator on field-effect mobility in an organic thin-film transistor Kim H, Bae JH, Horowitz G, Kim WY, Choi Y |
144 - 150 |
MOSFET gate dimension dependent drain and source leakage modeling by standard SPICE models Panko V, Banas S, Prejda D, Dobes J |
151 - 156 |
Characterization and modeling of low frequency noise in CMOS inverters Ioannidis EG, Haendler S, Dimitriadis CA, Ghibaudo G |
157 - 162 |
A high speed asymmetric T-shape cell in NMOS-selected phase change memory chip Wang JH, Zhou J, Zhou WL, Tong H, Huang DQ, Sun JJ, Zhang L, Long XM, Chen Y, Qu LW, Miao XS |
163 - 169 |
An improved model for InP/InGaAs double heterojunction bipolar transistors Shi YX, Jin Z, Su YB, Cao YX, Wang Y |