Solid-State Electronics

Solid-State Electronics, Vol.48, No.6 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (23 articles)

855 - 855	Silicon on insulator technology and devices - Foreword Cristoloveanu S
857 - 865	Nanoscale SOI MOSFETs: a comparison of two options Walls TJ, Sverdlov VA, Likharev KK
867 - 875	Device design and manufacturing issues for 10 nm-scale MOSFETs: a computational study Hasan S, Wang J, Lundstrom M
877 - 885	Blue sky in SOI: new opportunities for quantum and hot-electron devices Luryi S, Zaslavsky A
887 - 895	Emerging silicon-on-nothing (SON) devices technology Monfray S, Skotnicki T, Fenouillet-Beranger C, Carriere N, Chanemougame D, Morand Y, Descombes S, Talbot A, Dutartre D, Jenny C, Mazoyer P, Palla R, Leverd F, Le Friec Y, Pantel R, Borel S, Louis D, Buffet N
897 - 905	Multiple-gate SOI MOSFETs Colinge JP
907 - 917	Advanced SOI MOSFETs with buried alumina and ground plane: self-heating and short-channel effects Oshima K, Cristoloveanu S, Guillaumot B, Iwai H, Deleonibus S
919 - 926	A process/physics-based compact model for nonclassical CMOS device and circuit design Fossum JG, Ge L, Chiang MH, Trivedi VP, Chowdhury MM, Mathew L, Workman GO, Nguyen BY
927 - 936	Low field electron mobility in ultra-thin SOI MOSFETs: experimental characterization and theoretical investigation Esseni D, Sangiorgi E
937 - 945	Double gate silicon on insulator transistors. A Monte Carlo study Gamiz F, Roldan JB, Godoy A, Carceller JE, Cartujo P
947 - 959	Laterally asymmetric channel engineering in fully depleted double gate SOI MOSFETs for high performance analog applications Kranti A, Chung TM, Flandre D, Raskin JP
961 - 967	Requirements for ultra-thin-film devices and new materials for the CMOS roadmap Fenouillet-Beranger C, Skotnicki T, Monfray S, Carriere N, Boeuf F
969 - 978	Modeling the floating-body effects of fully depleted, partially depleted, and body-grounded SOI MOSFETs Chan M, Su P, Wan H, Lin CH, Fung SKH, Niknejad AM, Hu CM, Ko PK
979 - 984	Reduction in threshold voltage fluctuation in fully-depleted SOI MOSFETs with back gate control Numata T, Noguchi M, Takagi S
985 - 997	Low frequency noise and hot-carrier reliability in advanced SOI MOSFETs Dieudonne F, Haendler S, Jomaah J, Balestra F
999 - 1006	Fully depleted SOI process and device technology for digital and RF applications Ichikawa F, Nagatomo Y, Katakura Y, Itoh M, Itoh S, Matsuhashi H, Ichimori T, Hirashita N, Baba S
1007 - 1015	New SOI lateral power devices with trench oxide Park JM, Wagner S, Grasser T, Selberherr S
1017 - 1025	Composite ULP diode fabrication, modelling and applications in multi-V-th FD SOICMOS technology Levacq D, Liber C, Dessard V, Flandre D
1027 - 1044	Analysis of heavy-ion induced charge collection mechanisms in SOI circuits Schwank JR, Ferlet-Cavrois V, Dodd PE, Shaneyfelt MR, Vizkelethy G, Paillet P, Flament O
1045 - 1054	Total ionizing dose damage in deep submicron partially depleted SOI MOSFETs induced by proton irradiation Simoen E, Rafi JM, Mercha A, Claeys C
1055 - 1063	Smart-Cut (R) technology: from 300 mm ultrathin SOI production to advanced engineered substrates Maleville C, Mazure C
1065 - 1072	Qualification of 300 mm SOICMOS substrate material: readiness for development and manufacturing Hovel H, Almonte M, Tsai P, Lee JD, Maurer S, Kleinhenz R, Schepis D, Murphy R, Ronsheim P, Domenicucci A, Bettinger J, Sadana D
1073 - 1078	Two-dimensional simulation of pattern-dependent oxidation of silicon nanostructures on silicon-on-insulator substrates Uematsu M, Kageshima H, Shiraishi K, Nagase M, Horiguchi S, Takahashi Y